delay locked loop(DLL) - Globe Thesis

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Keyword [delay locked loop(DLL)] Result: 1 - 8 \| Page: 1 of 1
1.	The Built-in Self-test For Embedded DLL
2.	Research And Design Of High-performance Transceiver
3.	Improved For The Fpga Digital Phase Locked Loop Circuit Design,
4.	Design And Implementation Of Delay Management Module Applied To FPGA Chip
5.	Study And Design Of Multiplying Delay-locked Loop
6.	Design Of A Clock And Data Recovery Circuit Based On A Delay-and Phase-Locked Loop
7.	Research On Wall Clutter Suppression Method For Spread Spectrum Through-The-Wall Radar
8.	Single event transient modeling and mitigation techniques for mixed-signal delay locked loop (DLL) and clock circuits
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