On-Chip Networks - Globe Thesis

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1.	Low-power On-Chip Networks In High-Performance Multi-Core Processors
2.	Optimizations Of Memory Subsystem For Chip Multiprocessor Systems
3.	Research On Quality-of-service Guarantee In Bufferless On-chip Networks
4.	Research On The Architecture Of Hybrid Wireless On-chip Networks
5.	Adaptive on-chip networks and their impact on processor architectures
6.	Application-aware on-chip networks
7.	Scheduling on-chip networks
8.	Silicon Nanophotonics for Many-Core On-Chip Networks
9.	Fault Tolerant Architectures for On-Chip Networks
10.	Design of low-power and resource-efficient on-chip networks
11.	Optimizing Modern On-Chip Networks Through Circuit-Switching
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