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Keyword [Instruction-Level Parallelism]
Result: 1 - 18 | Page: 1 of 1
1.
High-efficiency Reconfigurable Array Computing: Architecture, Methodology And Application Mapping Technology
2.
Research On Software Pipelining Techniques For EPIC Architectures
3.
Dynamic Optimization And Microprocessor Architecture Support For Dynamic Binary Translation
4.
The Key Technology Research, Instruction-level Parallelism Compiled
5.
Global Acyclic Instruction Scheduling Research
6.
Research On Optimization Of Software Pipelining For IA-64 Architecture
7.
Research Of If-conversion Techniques Based On IA-64 Predicated Execution
8.
Loop Realization And Optimization Based On X Stream Processor
9.
Parallel Algorithm Design And Optimization For H.264 Video Encoding
10.
The Research And Implementation Of Key Techniques On Block Cipher ASIP
11.
Instruction-level Parallelism To Develop Key Technologies To Achieve
12.
Video Compression Application Performance Optimization Study
13.
Design And Implementation Of Multi-thread Processor’s Instruction Dual-issue Structure
14.
Design And Optimization Of The Register Renaming Mechanism In An Out-Of-Order Superscalar Processor
15.
Performance Estimation Of Multithreaded System On Heterogeneous Multi-core
16.
Research On Energy Efficiency Optimization Of Superscalar Processor
17.
Branch optimizations and instruction-level parallelism exploitation for dynamic superscalar and VLIW processors
18.
VLIW processors: Efficiently exploiting instruction level parallelism
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