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Keyword [All-Digital PLL]
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1. SDH Equipment Clock Design And Realization Based FPGA
2. Research And Design Of All-digital PLL With High Frequency And Low Jitter Performance
3. A Time-Domain All-Digital PLL Design
4. The All Digital Phase Lock Loop Technology For Wireless Communication
5. A New Type Of Pseudo-pipelined Time - Digital Converter System Modeling And Research Of Key Technologies
6. The Key Technology Research For Low Power Frequency Synthesizer
7. Research On Spurious Supression And Locking Auxiliary Circuit For All-Digital PLL
8. Research And Design Ofall-digital Phase-locked Loops With Time To Digital Converters
9. The Research Of Bit Synchronization Algorithm In Software Radio Based On FPGA
10. Research & Design Of The DTC-Assisted Fractional-N All-Digital PLL
11. Research & Design Of All-digital PLL
12. The Core Chip Design Of Fast Locked All Digital Phase-locked Loop
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